This invention relates to an ATM switch (Asynchronous Transfer Mode exchanger) and an ATM switching system, more particularly, to an ATM switch performing complicated protocol management required for ABR transmission (Available Bit Rate communication) while maintaining a high switching function.
ATM transmission uses "cells" as units of transmission data. Cells have fixed and relatively short data lengths than those of typical packets. Fixed data lengths permit unification of cell formats (data constructions), and short data lengths decrease the residence time of transmission data in switches during stored forward switching. These factors contribute to a decrease in data residence time in ATM switches and high-speed data exchange or transfer.
FIG. 15 shows an example of conventional ATM switches.
As shown in FIG. 15, an ATM switch is typically divided into a cell exchange portion 152 for exchanging ATM cells and link interface portions 151-i, 151-j for applying information to be exchanged and for rewriting ATM cell headers. The link interface portions 151-i and 151-j are connected to a bass via physical layers 153-i and 153-j, respectively.
In conventional systems, processing to cells was done in a fixed type sequencer in order to make use of the aforementioned properties of ATM transmission. That is, the link interface portion 151-i contains an input fixed sequencer 155-i located at the input side of the cell exchanger 152 and an output fixed sequencer 156-i located at the output side of the cell exchanger 152. These input fixed sequencer 155-i and output fixed sequencer 156-j can execute application or removal of switching information required in the cell exchanger 152-i for input cells to the cell exchange portion 152 and usual jobs such as rewriting of ATM cell headers for input cells to and output cells from the cell exchange portion 152.
Fixed sequencers, however, cannot deal with complicated protocol management such as ABR (Available Bit Rate) processing. Therefore, the system relied on the CPU 154-i outside the link interface 151-i for such functions, and did not incorporate means therefor on the LSI substrate forming the link interface 151-i.
Although the ATM transmission system intends high switching, it must execute complicated protocol management at a high speed in order to execute network control, especially OAM (Operation, Administration and Maintenance), and to execute ABR processing, especially RM (Resource Management) for realizing a traffic management function.
Since conventional systems could not sufficiently cope with ABR processing and other complicated cell processing by using fixed sequencers, an external processor is relied upon for these jobs. In this case, data must be transferred once to the external processor and retransferred back to the link interface after the jobs in the external processor. Therefore, it could not ensure an acceptable throughput of data and to increase the performance of the system on ABR cell processing to the maximum limit. Moreover, the control by the external processor applies a load also to normal switching jobs of the ATM switch, which results in a delay of usual switching jobs.